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"AMD64" and "Intel 64" redirect here. For the Intel 64-bit architecture called IA-64, see Itanium.
Opteron, the first CPU to introduce the x86-64 extensions in 2003

x86-64 (also known as x64, x86_64 and AMD64) is the 64-bit version of the x86 instruction set. It supports vastly larger amounts (theoretically, 264 bytes or 16 exbibytes) of virtual memory and physical memory than is possible on its predecessors, allowing programs to store larger amounts of data in memory. x86-64 also provides 64-bit general purpose registers and numerous other enhancements. The original specification was created by AMD, and has been implemented by AMD, Intel, VIA, and others[who?]. It is fully backwards compatible with 16-bit and 32-bit x86 code.[1](p13–14) Because the full x86 16-bit and 32-bit instruction sets remain implemented in hardware without any intervening emulation, existing x86 executables run with no compatibility or performance penalties,[2] whereas existing applications that are recoded to take advantage of new features of the processor design may achieve performance improvements.

Prior to launch, "x86-64" and "x86_64" were used to refer to the instruction set. Upon release, AMD named it AMD64.[3] Intel initially used the names IA-32e and EM64T before finally settling on Intel 64 for their implementation. Some in the industry, including Apple,[4][5][6] use x86-64 and x86_64, while others, notably Sun Microsystems[7] (now Oracle Corporation) and Microsoft,[8] use x64 while the BSD family of OSs and several Linux distributions[9][10] use AMD64.

The AMD K8 processor was the first to implement the architecture; this was the first significant addition to the x86 architecture designed by a company other than Intel. Intel was forced to follow suit and introduced a modified NetBurst family which was fully software-compatible with AMD's design and specification. VIA Technologies introduced x86-64 in their VIA Isaiah architecture, with the VIA Nano.

The x86-64 specification is distinct from the Intel Itanium (formerly IA-64) architecture, which is not compatible on the native instruction set level with the x86 architecture.


AMD64 logo

The AMD64 instruction set is implemented in AMD's Opteron, Athlon 64, Athlon 64 FX, Athlon 64 X2, Athlon II, Athlon X2, Turion 64, Turion 64 X2, later Sempron, Phenom, Phenom II, FX, and Fusion processors.

History of AMD64[edit]

AMD64 was created as an alternative to the radically different IA-64 architecture, which was designed by Intel and Hewlett Packard. Originally announced in 1999[11] with a full specification in August 2000,[12] the AMD64 architecture was positioned by AMD from the beginning as an evolutionary way to add 64-bit computing capabilities to the existing x86 architecture, as opposed to Intel's approach of creating an entirely new 64-bit architecture with IA-64.

The first AMD64-based processor, the Opteron, was released in April 2003.

Architectural features[edit]

The primary defining characteristic of AMD64 is the availability of 64-bit general-purpose processor registers (for example, rax and rbx), 64-bit integer arithmetic and logical operations, and 64-bit virtual addresses. The designers took the opportunity to make other improvements as well. The most significant changes include:

AMD64 still has fewer registers than many common RISC instruction sets (which typically have 32 registers) or VLIW-like machines such as the IA-64 (which has 128 registers). However, an AMD64 implementation may have far more internal registers than the number of architectural registers exposed by the instruction set (see register renaming).
This means that very large files can be operated on by mapping the entire file into the process' address space (which is often much faster than working with file read/write calls), rather than having to map regions of the file into and out of the address space.
Segmented addressing has long been considered an obsolete mode of operation, and all current PC operating systems in effect bypass it, setting all segments to a base address of zero and (in their 32 bit implementation) a size of 4 GB. AMD was the first x86-family vendor to implement no-execute in linear addressing mode. The feature is also available in legacy mode on AMD64 processors, and recent Intel x86 processors, when PAE is used.

Virtual address space details[edit]

Canonical form addresses[edit]

Although virtual addresses are 64 bits wide in 64-bit mode, current implementations (and all chips known to be in the planning stages) do not allow the entire virtual address space of 264 bytes (16 EB) to be used. This would be approximately four billion times the size of virtual address space on 32-bit machines. Most operating systems and applications will not need such a large address space for the foreseeable future, so implementing such wide virtual addresses would simply increase the complexity and cost of address translation with no real benefit. AMD therefore decided that, in the first implementations of the architecture, only the least significant 48 bits of a virtual address would actually be used in address translation (page table lookup).[1](p120)

In addition, the AMD specification requires that bits 48 through 63 of any virtual address must be copies of bit 47 (in a manner akin to sign extension), or the processor will raise an exception.[1](p131) Addresses complying with this rule are referred to as "canonical form."[1](p130) Canonical form addresses run from 0 through 00007FFF'FFFFFFFF, and from FFFF8000'00000000 through FFFFFFFF'FFFFFFFF, for a total of 256 TB of usable virtual address space. This is still approximately 64,000 times the virtual address space on 32-bit machines.

This feature eases later scalability to true 64-bit addressing. Many operating systems (including, but not limited to, the Windows NT family) take the higher-addressed half of the address space (named kernel space) for themselves and leave the lower-addressed half (user space) for application code, user mode stacks, heaps, and other data regions.[17] The "canonical address" design ensures that every AMD64 compliant implementation has, in effect, two memory halves: the lower half starts at 00000000'00000000 and "grows upwards" as more virtual address bits become available, while the higher half is "docked" to the top of the address space and grows downwards. Also, enforcing the "canonical form" of addresses by checking the unused address bits prevents their use by operating system in tagged pointers as flags, privilege markers, etc., as such use could become problematic when the architecture is extended to implement more virtual address bits.

Current 48-bit




Full 64-bit


Implementations of canonical address space (diagram not to scale).

The first versions of Windows for x64 did not even use the full 256 TB; they were restricted to just 8 TB of user space and 8 TB of kernel space.[17] Windows did not support the entire 48-bit address space until Windows 8.1 (released October 2013).[17]

Page table structure[edit]

The 64-bit addressing mode ("long mode") is a superset of Physical Address Extensions (PAE); because of this, page sizes may be 4 KB (212 bytes) or 2 MB (221 bytes).[1](p120) Long mode also supports page sizes of 1 GB (230 bytes).[1](p120) Rather than the three-level page table system used by systems in PAE mode, systems running in long mode use four levels of page table: PAE's Page-Directory Pointer Table is extended from 4 entries to 512, and an additional Page-Map Level 4 (PML4) Table is added, containing 512 entries in 48-bit implementations.[1](p131) In implementations providing larger virtual addresses, this latter table would either grow to accommodate sufficient entries to describe the entire address range, up to a theoretical maximum of 33,554,432 entries for a 64-bit implementation, or be over ranked by a new mapping level, such as a PML5. A full mapping hierarchy of 4 KB pages for the whole 48-bit space would take a bit more than 512 GB of RAM (about 0.196% of the 256 TB virtual space).

Operating system limits[edit]

The operating system can also limit the virtual address space. Details, where applicable, are given in the "Operating system compatibility and characteristics" section.

Physical address space details[edit]

Current AMD64 implementations support a physical address space of up to 248 bytes of RAM, or 256 TB.[14] A larger amount of installed RAM allows the operating system to keep more of the workload's pageable data and code in RAM, which can improve performance,[18] though various workloads will have different points of diminishing returns.[19][20]

The upper limit on RAM that can be used in a given x86-64 system depends on a variety of factors and can be far less than that implemented by the processor. For example, as of June 2010, there are no known motherboards for x86-64 processors that support 256 TB of RAM.[21][22][23][24] The operating system may place additional limits on the amount of RAM that is usable or supported. Details on this point are given in the "Operating system compatibility and characteristics" section of this article.

Operating modes[edit]

Operating modeOperating sub-modeOperating system requiredType of code being runDefault address sizeDefault operand sizeSupported typical operand sizesRegister file sizeTypical GPR width
Long mode64-bit mode64-bit operating system or boot loader64-bit code64 bits32 bits8, 16, 32, or 64 bits16 registers per file64 bits
Compatibility mode64-bit operating system or boot loader32-bit protected mode code32 bits32 bits8, 16, or 32 bits8 registers per file32 bits
64-bit operating system16-bit protected mode code16 bits16 bits8, 16, or 32 bits8 registers per file32 bits
Legacy modeProtected mode32-bit operating system or boot loader, or 64-bit boot loader32-bit protected mode code32 bits32 bits8, 16, or 32 bits8 registers per file32 bits
16-bit protected mode operating system or boot loader, or 32- or 64-bit boot loader16-bit protected mode code16 bits16 bits8, 16, or 32 bits8 registers per file16 or 32 bits
Virtual 8086 mode16- or 32-bit protected mode operating system16-bit real mode code16 bits16 bits8, 16, or 32 bits8 registers per file16 or 32 bits
Real mode16-bit real mode operating system or boot loader, or 32- or 64-bit boot loader16-bit real mode code16 bits16 bits8, 16, or 32 bits8 registers per file16 or 32 bits

The traditional x87 FPU register stack is not included in the register file size extension in 64-bit mode, compared with the XMM registers used by SSE2, which did get extended. The x87 register stack is not a simple register file although it does allow direct access to individual registers by low cost exchange operations. Also note that 16-bit code written for the 80286 and below cannot use the 32-bit general-purpose registers (GPRs). 16-bit code written for the 80386 and above can use 32-bit GPRs, but defaults to using 16-bit operands.

State diagram of the x86-64 operating modes

The architecture has two primary modes of operation, long mode and legacy mode.

Long mode[edit]

Main article: Long mode

The architecture's intended primary mode of operation; it is a combination of the processor's native 64-bit mode and a combined 32-bit and 16-bit compatibility mode. It is used by 64-bit operating systems. Under a 64-bit operating system, 64-bit programs run under 64-bit mode, and 32-bit and 16-bit protected mode applications (that do not need to use either real mode or virtual 8086 mode in order to execute at any time) run under compatibility mode. Real-mode programs and programs that use virtual 8086 mode at any time cannot be run in long mode unless those modes are emulated in software.[1]:11 However, such programs may be started from an operating system running in long mode on processors supporting VT-x or AMD-V by creating a virtual processor running in the desired mode.

Since the basic instruction set is the same, there is almost no performance penalty for executing protected mode x86 code. This is unlike Intel's IA-64, where differences in the underlying instruction set means that running 32-bit code must be done either in emulation of x86 (making the process slower) or with a dedicated x86 processor. However, on the x86-64 platform, many x86 applications could benefit from a 64-bit recompile, due to the additional registers in 64-bit code and guaranteed SSE2-based FPU support, which a compiler can use for optimization. However, applications that regularly handle integers wider than 32 bits, such as cryptographic algorithms, will need a rewrite of the code handling the huge integers in order to take advantage of the 64-bit registers.

Legacy mode[edit]

The mode used by 16-bit ('protected mode' or 'real mode') and 32-bit operating systems. In this mode, the processor acts like a 32-bit x86 processor, and only 16-bit and 32-bit code can be executed. Legacy mode allows for a maximum of 32 bit virtual addressing which limits the virtual address space to 4 GB.[1](p14)(p24)(p118) 64-bit programs cannot be run from legacy mode.

AMD64 implementations[edit]

The following processors implement the AMD64 architecture:

Intel 64[edit]

Intel 64 is Intel's implementation of x86-64. It is used in newer versions of Pentium 4, Celeron, Celeron D, Xeon and Pentium Dual-Core processors, the Atom 230, 330, D410, D425, D510, D525, N450, N455, N470, N475, N550, N570, N2600 and N2800 and in all versions of the Pentium Extreme Edition, Core 2, Core i7, Core i5, and Core i3 processors.

History of Intel 64[edit]

Historically, AMD has developed and produced processors with instruction sets patterned after Intel's original designs, but with x86-64, roles were reversed: Intel found itself in the position of adopting the ISA which AMD had created as an extension to Intel's own x86 processor line.

Intel's project was originally codenamed Yamhill (after the Yamhill River in Oregon's Willamette Valley). After several years of denying its existence, Intel announced at the February 2004 IDF that the project was indeed underway. Intel's chairman at the time, Craig Barrett, admitted that this was one of their worst kept secrets.[25][26]

Intel's name for this instruction set has changed several times. The name used at the IDF was CT (presumably for Clackamas Technology, another codename from an Oregon river); within weeks they began referring to it as IA-32e (for IA-32 extensions) and in March 2004 unveiled the "official" name EM64T (Extended Memory 64 Technology). In late 2006 Intel began instead using the name Intel 64 for its implementation, paralleling AMD's use of the name AMD64.[27]

Intel 64 implementations[edit]

The first processor to implement Intel 64 was the multi-socket processor Xeon code-named Nocona in June 2004. In contrast, the initial Prescott chips (February 2004) did not enable this feature. Intel subsequently began selling Intel 64-enabled Pentium 4s using the E0 revision of the Prescott core, being sold on the OEM market as the Pentium 4, model F. The E0 revision also adds eXecute Disable (XD) (Intel's name for the NX bit) to Intel 64, and has been included in then current Xeon code-named Irwindale. Intel's official launch of Intel 64 (under the name EM64T at that time) in mainstream desktop processors was the N0 Stepping Prescott-2M. All 9xx, 8xx, 6xx, 5x9, 5x6, 5x1, 3x6, and 3x1 series CPUs have Intel 64 enabled, as do the Core 2 CPUs, as will future Intel CPUs for workstations or servers. Intel 64 is also present in the last members of the Celeron D line.

The first Intel mobile processor implementing Intel 64 is the Merom version of the Core 2 processor, which was released on July 27, 2006. None of Intel's earlier notebook CPUs (Core Duo, Pentium M, Celeron M, Mobile Pentium 4) implements Intel 64.

The following processors implement the Intel 64 architecture:

VIA's x86-64 implementation[edit]

VIA Technologies introduced their version of the x86-64 architecture in 2008 after five years of development by its CPU division, Centaur Technology.[28] Codenamed "Isaiah", the 64-bit architecture was unveiled on January 24, 2008,[29] and launched on May 29 under the VIA Nano brand name.[30]

The processor supports a number of VIA-specific x86 extensions designed to boost efficiency in low-power appliances. It is expected that the Isaiah architecture will be twice as fast in integer performance and four times as fast in floating-point performance as the previous-generation VIA Esther at an equivalent clock speed. Power consumption is also expected to be on par with the previous-generation VIA CPUs, with thermal design power ranging from 5 W to 25 W.[31] Being a completely new design, the Isaiah architecture was built with support for features like the x86-64 instruction set and x86 virtualization which were unavailable on its predecessors, the VIA C7 line, while retaining their encryption extensions.

Differences between AMD64 and Intel 64[edit]

Although nearly identical, there are some differences between the two instruction sets in the semantics of a few seldom used machine instructions (or situations), which are mainly used for system programming.[32] Compilers generally produce executables (i.e. machine code) that avoid any differences, at least for ordinary application programs. This is therefore of interest mainly to developers of compilers, operating systems and similar, which must deal with individual and special system instructions.

Recent implementations[edit]

Older implementations[edit]


Area chart showing the representation of different families of microprocessors in the TOP500 supercomputer ranking list, from 1992 to 2014.[44]

In supercomputers tracked by TOP500, the appearance of 64-bit extensions for the x86 architecture enabled 64-bit x86 processors by AMD and Intel (orange and blue on the diagram on the right, respectively) to replace most RISC processor architectures previously used in such systems (including PA-RISC, SPARC, Alpha and others), as well as 32-bit x86 (green on the diagram), even though Intel itself initially tried unsuccessfully to replace x86 with a new incompatible 64-bit architecture in the Itanium processor.

As of 2014, the main non-x86 CPU architecture which is still used in supercomputing is the Power Architecture used by IBM POWER microprocessors (red on the diagram), with SPARC being far behind in numbers on TOP500, while recently a Fujitsu SPARC64 VIIIfx based supercomputer without co-processors reached number one that is still in the top ten. Non-CPU architecture co-processors (GPGPU) have also played a big role in performance. Intel's Xeon Phi coprocessors, which implement a subset of x86-64 with some vector extensions,[45] are also used, along with x86-64 processors, in the Tianhe-2 supercomputer.[46]

Operating system compatibility and characteristics[edit]

The following operating systems and releases support the x86-64 architecture in long mode.


DragonFly BSD[edit]

Preliminary infrastructure work was started in February 2004 for a x86-64 port.[47] This development later stalled. Development started again during July 2007[48] and continued during Google Summer of Code 2008 and SoC 2009.[49][50] The first official release to contain x86-64 support was version 2.4.[51]


FreeBSD first added x86-64 support under the name "amd64" as an experimental architecture in 5.1-RELEASE in June 2003. It was included as a standard distribution architecture as of 5.2-RELEASE in January 2004. Since then, FreeBSD has designated it as a Tier 1 platform. The 6.0-RELEASE version cleaned up some quirks with running x86 executables under amd64, and most drivers work just as they do on the x86 architecture. Work is currently being done to integrate more fully the x86 application binary interface (ABI), in the same manner as the Linux 32-bit ABI compatibility currently works.


x86-64 architecture support was first committed to the NetBSD source tree on June 19, 2001. As of NetBSD 2.0, released on December 9, 2004, NetBSD/amd64 is a fully integrated and supported port. 32-bit code is still supported in 64-bit mode, with a netbsd-32 kernel compatibility layer for 32-bit syscalls. The NX bit is used to provide non-executable stack and heap with per-page granularity (segment granularity being used on 32-bit x86).


OpenBSD has supported AMD64 since OpenBSD 3.5, released on May 1, 2004. Complete in-tree implementation of AMD64 support was achieved prior to the hardware's initial release due to AMD's loaning of several machines for the project's hackathon that year. OpenBSD developers have taken to the platform because of its support for the NX bit, which allowed for an easy implementation of the W^X feature.

The code for the AMD64 port of OpenBSD also runs on Intel 64 processors which contains cloned use of the AMD64 extensions, but since Intel left out the page table NX bit in early Intel 64 processors, there is no W^X capability on those Intel CPUs; later Intel 64 processors added the NX bit under the name "XD bit". Symmetric multiprocessing (SMP) works on OpenBSD's AMD64 port, starting with release 3.6 on November 1, 2004.


It is possible to enter long mode under DOS without a DOS extender,[52] but the user must return to real mode in order to call BIOS or DOS interrupts.

It may also be possible to enter long mode with a DOS extender similar to DOS/4GW, but more complex since x86-64 lacks virtual 8086 mode. DOS itself is not aware of that, and no benefits should be expected unless running DOS in an emulation with an adequate virtualization driver backend, for example: the mass storage interface.


Linux was the first operating system kernel to run the x86-64 architecture in long mode, starting with the 2.4 version in 2001 (prior to the physical hardware's availability).[53][54] Linux also provides backward compatibility for running 32-bit executables. This permits programs to be recompiled into long mode while retaining the use of 32-bit programs. Several Linux distributions currently ship with x86-64-native kernels and userlands. Some, such as Arch Linux,[55] SUSE, Mandriva, and Debian GNU/Linux, allow users to install a set of 32-bit components and libraries when installing off a 64-bit DVD, thus allowing most existing 32-bit applications to run alongside the 64-bit OS. Other distributions, such as Fedora, Slackware and Ubuntu, are available in one version compiled for a 32-bit architecture and another compiled for a 64-bit architecture. Fedora and Red Hat Enterprise Linux allow concurrent installation of all userland components in both 32 and 64-bit versions on a 64-bit system.

x32 ABI (Application Binary Interface), introduced in Linux 3.4, allows programs compiled for the x32 ABI to run in the 64-bit mode of x86-64 while only using 32-bit pointers and data fields.[56][57][58] Though this limits the program to a virtual address space of 4 GB it also decreases the memory footprint of the program and in some cases can allow it to run faster.[56][57][58]

64-bit Linux allows up to 128 TB of virtual address space for individual processes, and can address approximately 64 TB of physical memory, subject to processor and system limitations.[59]

OS X[edit]

Mac OS X v10.4.7 and higher versions of Mac OS X v10.4 run 64-bit command-line tools using the POSIX and math libraries on 64-bit Intel-based machines, just as all versions of Mac OS X v10.4 and 10.5 run them on 64-bit PowerPC machines. No other libraries or frameworks work with 64-bit applications in Mac OS X v10.4.[60] The kernel, and all kernel extensions, are 32-bit only.

Mac OS X v10.5 supports 64-bit GUI applications using Cocoa, Quartz, OpenGL, and X11 on 64-bit Intel-based machines, as well as on 64-bit PowerPC machines.[61] All non-GUI libraries and frameworks also support 64-bit applications on those platforms. The kernel, and all kernel extensions, are 32-bit only.

Mac OS X v10.6 is the first version of OS X that supports a 64-bit kernel. However, not all 64-bit computers can run the 64-bit kernel, and not all 64-bit computers that can run the 64-bit kernel will do so by default.[62] The 64-bit kernel, like the 32-bit kernel, supports 32-bit applications; both kernels also support 64-bit applications. 32-bit applications have a virtual address space limit of 4 GB under either kernel.[63][64]

OS X v10.8 includes only the 64-bit kernel, but continues to support 32-bit applications.

The 64-bit kernel does not support 32-bit kernel extensions, and the 32-bit kernel does not support 64-bit kernel extensions.

OS X uses the universal binary format to package 32- and 64-bit versions of application and library code into a single file; the most appropriate version is automatically selected at load time. In Mac OS X 10.6, the universal binary format is also used for the kernel and for those kernel extensions that support both 32-bit and 64-bit kernels.


Solaris 10 and later releases support the x86-64 architecture.

For Solaris 10, just as with the SPARC architecture, there is only one operating system image, which contains a 32-bit kernel and a 64-bit kernel; this is labeled as the "x64/x86" DVD-ROM image. The default behavior is to boot a 64-bit kernel, allowing both 64-bit and existing or new 32-bit executables to be run. A 32-bit kernel can also be manually selected, in which case only 32-bit executables will run. The isainfo command can be used to determine if a system is running a 64-bit kernel.

For Solaris 11, only the 64-bit kernel is provided. However, the 64-bit kernel supports both 32- and 64-bit executables, libraries, and system calls.


x64 editions of Microsoft Windows client and server—Windows XP Professional x64 Edition and Windows Server 2003 x64 Edition—were released in March 2005. Internally they are actually the same build (5.2.3790.1830 SP1), as they share the same source base and operating system binaries, so even system updates are released in unified packages, much in the manner as Windows 2000 Professional and Server editions for x86. Windows Vista, which also has many different editions, was released in January 2007. Windows 7 was released in July 2009. Windows Server 2008 R2 and later versions will only be available as x64 versions.

Prior to Windows 8.1/Windows Server 2012 R2, Windows for x64 offered:

Under Windows 8.1 and Windows Server 2012 R2, both user mode and kernel mode virtual address spaces have been extended to 128 TB.[17] These versions of Windows will not install on processors that lack the CMPXCHG16B instruction.

The following additional characteristics apply to all x64 versions of Windows:

Video game consoles[edit]

PlayStation 4 and Xbox One include Jaguar, a multi-core processor designed by AMD. Both use x86-64 to address 8 GB of RAM.[73][74]

Industry naming conventions[edit]

Since AMD64 and Intel 64 are substantially similar, many software and hardware products use one vendor-neutral term to indicate their compatibility with both implementations. AMD's original designation for this processor architecture, "x86-64", is still sometimes used for this purpose,[4] as is the variant "x86_64".[5][6] Other companies, such as Microsoft[8] and Sun Microsystems/Oracle Corporation,[7] use the contraction "x64" in marketing material.

The term IA-64 refers to the Itanium processor, and should not be confused with x86-64, as it is a completely different instruction set.

Many operating systems and products, especially those that introduced x86-64 support prior to Intel's entry into the market, use the term "AMD64" or "amd64" to refer to both AMD64 and Intel 64.

Licensing issues[edit]

Intel licenses to AMD the right to use the original x86 architecture (upon which AMD's x86-64 is based).[77][78] In 2009, AMD and Intel settled several lawsuits and cross-licensing disagreements, extending their cross-licensing agreements.[79][80]

See also[edit]

Notes and references[edit]

  1. ^ a b c d e f g h i j k l m n o p q AMD Corporation (September 2012). "Volume 2: System Programming" (PDF). AMD64 Architecture Programmer's Manual. AMD Corporation. Retrieved 2014-02-17. 
  2. ^ IBM Corporation (2007-09-06). "IBM WebSphere Application Server 64-bit Performance Demystified". p. 14. Retrieved 2010-04-09. "Figures 5, 6 and 7 also show the 32-bit version of WAS runs applications at full native hardware performance on the POWER and x86-64 platforms. Unlike some 64-bit processor architectures, the POWER and x86-64 hardware does not emulate 32-bit mode. Therefore applications that do not benefit from 64-bit features can run with full performance on the 32-bit version of WebSphere running on the above mentioned 64-bit platforms." 
  3. ^ "Debian AMD64 FAQ". Debian Wiki. Retrieved 2012-05-03. 
  4. ^ a b c "x86-64 Code Model". Apple. Retrieved November 23, 2012. 
  5. ^ a b c arch(1) – Darwin and Mac OS X General Commands Manual
  6. ^ a b c Kevin Van Vechten (2006-08-09). "re: Intel XNU bug report". Darwin-dev mailing list. Apple Computer. Retrieved 2006-10-05. "The kernel and developer tools have standardized on "x86_64" for the name of the Mach-O architecture" 
  7. ^ a b "Solaris 10 on AMD Opteron". Oracle. Retrieved 2010-12-09. 
  8. ^ a b "Microsoft 64-Bit Computing". Microsoft. Retrieved 2010-12-09. 
  9. ^ "AMD64 Port". Debian. Retrieved November 23, 2012. 
  10. ^ "Gentoo/AMD64 Project". Gentoo Project. Retrieved May 27, 2013. 
  11. ^ "AMD Discloses New Technologies At Microporcessor Forum" (Press release). AMD. 1999-10-05. Retrieved 2010-11-09. 
  12. ^ "AMD Releases x86-64 Architectural Specification; Enables Market Driven Migration to 64-Bit Computing" (Press release). AMD. 2000-08-10. Retrieved 2010-11-09. 
  13. ^ "Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A: System Programming Guide, Part 1" (PDF). pp. 4–10. Retrieved 2010-05-29. 
  14. ^ a b "BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors" (PDF). p. 24. Retrieved 2010-05-29. "Physical address space increased to 48 bits." [dead link]
  15. ^ "Myth and facts about 64-bit Linux" (PDF). 2008-03-02. p. 7. Retrieved 2010-05-30. "Physical address space increased to 48 bits" 
  16. ^ Shanley, Tom (1998). Pentium Pro and Pentium II System Architecture. PC System Architecture Series (Second ed.). Addison-Wesley. p. 445. ISBN 0-201-30973-4. 
  17. ^ a b c d "Memory Limits for Windows Releases". MSDN. Microsoft. November 16, 2013. Retrieved January 20, 2014. 
  18. ^ Jeff Tyson (2004-01-15). "How Virtual Memory Works". howstuffworks. Retrieved 2010-06-07. "The read/write speed of a hard drive is much slower than RAM, and the technology of a hard drive is not geared toward accessing small pieces of data at a time. If your system has to rely too heavily on virtual memory, you will notice a significant performance drop. The key is to have enough RAM to handle everything you tend to work on simultaneously." 
  19. ^ Jason Dunn (2003-09-03). "Computer RAM: A Crucial Component in Video Editing". Microsoft Corporation. Retrieved 2010-06-09. "There's a point of diminishing returns where adding more RAM won't give you better system performance." 
  20. ^ "Understanding Memory Configurations and Exchange Performance". Microsoft Corporation. 2003-09-03. Retrieved 2010. "There is, however, a point of diminishing returns at which adding memory to the server may not be justifiable based on price and performance." 
  21. ^ "Opteron 6100 Series Motherboards". Supermicro Corporation. Retrieved 2010-06-22. 
  22. ^ "Supermicro XeonSolutions". Supermicro Corporation. Retrieved 2010-06-20. 
  23. ^ "Opteron 8000 Series Motherboards". Supermicro Corporation. Retrieved 2010-06-20. 
  24. ^ "Tyan Product Matrix". MiTEC International Corporation. Retrieved 2010-06-21. 
  25. ^ "Craig Barrett confirms 64 bit address extensions for Xeon. And Prescott", from The Inquirer
  26. ^ "A Roundup of 64-Bit Computing", from internetnews.com
  27. ^ "Intel 64 Architecture". Intel. Retrieved 2007-06-29. 
  28. ^ "VIA to launch new processor architecture in 1Q08" (subscription required). DigiTimes. Retrieved 2007-07-25. 
  29. ^ Stokes, Jon (2008-01-23). "Isaiah revealed: VIA's new low-power architecture". Ars Technica. Retrieved 2008-01-24. 
  30. ^ "VIA Launches VIA Nano Processor Family" (Press release). VIA. 2008-05-29. Retrieved 2008-05-29. 
  31. ^ "VIA Isaiah Architecture Introduction" (PDF). VIA. 2008-01-23. Retrieved 2013-07-31. 
  32. ^ Wasson, Scott. "64-bit computing in theory and practice". The Tech Report. The Tech Report. Retrieved 2011-03-22. 
  33. ^ "Intel 64 and IA-32 Architectures Software Developer’s Manual Volume 2 (2A, 2B & 2C): Instruction Set Reference, A-Z". Intel. September 2013. pp. 4–397. Retrieved 2014-01-21. 
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