PHY (chip)

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PHY is an abbreviation for the physical layer of the OSI model.

An instantiation of PHY connects a link layer device (often called MAC as an abbreviation for Media Access Control) to a physical medium such as an optical fiber or copper cable. A PHY device typically includes a Physical Coding Sublayer (PCS) and a Physical Medium Dependent (PMD) layer.[1] The PCS encodes and decodes the data that is transmitted and received. The purpose of the encoding is to make it easier for the receiver to recover the signal.

Example uses[edit]

Ethernet physical transceiver[edit]

An Ethernet physical transceiver is often referred to as a physical layer transmitter and/or receiver, a physical layer transceiver, a PHY transceiver, a PHYceiver, or simply a PHY. The term PHYceiver is often shown as being TM (Trade Marked) but is not currently registered with TESS United States Patent and Trademark Office. PHYceiver is used in marketing data sheets and frequently referenced in Patents. It is a component that operates at the physical layer of the OSI network model. The transceiver implements the Ethernet physical layer portion of the 1000BASE-T, 100BASE-TX, and 10BASE-T standards.

An Ethernet PHYceiver is a chip that implements the hardware send and receive function of Ethernet frames; it interfaces to the line modulation at one end and binary packet signaling at the other. Functions like MAC addressing are implemented by the Media Access Control function. Wake-on-LAN and Boot ROM functionality is implemented in the network interface card (NIC), which may have PHY, MAC and other functionality integrated into one chip or as separate chips.

An example are the Marvell Alaska 88E1310/88E1310S/88E1318/88E1318S Gigabit Ethernet transceivers


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