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NAND logic table

Input

Output

A

B

0

0

1

0

1

1

1

0

1

1

1

0

The TTL 7400 chip, containing four NANDs. The two additional pins supply power (+5 V) and connect the ground

In digital electronics, a NAND gate (Negated AND or NOT AND) is a logic gate which produces an output that is false only if all its inputs are true. A LOW (0) output results only if both the inputs to the gate are HIGH (1); if one or both inputs are LOW (0), a HIGH (1) output results. It is made using transistors.

The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness.

Digital systems employing certain logic circuits take advantage of NAND's functional completeness.

The function NAND(a_{1}, a_{2}, ..., a_{n}) is logically equivalent to NOT(a_{1} AND a_{2} AND ... AND a_{n}).

There are three symbols for NAND gates: the MIL/ANSI symbol, the IEC symbol and the deprecated DIN symbol sometimes found on old schematics. For more information see logic gate symbols.

MIL/ANSI Symbol

IEC Symbol

DIN Symbol

Hardware description and pinout[edit]

NAND gates are basic logic gates, and as such they are recognised in TTL and CMOSICs.

This schematic diagram shows the arrangement of NAND gates within a standard 4011 CMOS integrated circuit.

CMOS version[edit]

The standard, 4000 series, CMOSIC is the 4011, which includes four independent, two-input, NAND gates.

The NAND gate has the property of functional completeness. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates. An entire processor can be created using NAND gates alone. In TTL ICs using multiple-emitter transistors, it also requires fewer transistors than a NOR gate.