Linear feedback shift register

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A 4-bit Fibonacci LFSR with its state diagram. The XOR gate provides feedback to the register that shifts bits from left to right. The maximal sequence consists of every possible state except the "0000" state.

In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state.

The most commonly used linear function of single bits is XOR. Thus, an LFSR is most often a shift register whose input bit is driven by the exclusive-or (XOR) of some bits of the overall shift register value.

The initial value of the LFSR is called the seed, and because the operation of the register is deterministic, the stream of values produced by the register is completely determined by its current (or previous) state. Likewise, because the register has a finite number of possible states, it must eventually enter a repeating cycle. However, an LFSR with a well-chosen feedback function can produce a sequence of bits which appears random and which has a very long cycle.

Applications of LFSRs include generating pseudo-random numbers, pseudo-noise sequences, fast digital counters, and whitening sequences. Both hardware and software implementations of LFSRs are common.

The mathematics of a cyclic redundancy check, used to provide a quick check against transmission errors, are closely related to those of an LFSR.

Fibonacci LFSRs[edit]

A 16-bit Fibonacci LFSR. The feedback tap numbers in white correspond to a primitive polynomial in the table so the register cycles through the maximum number of 65535 states excluding the all-zeroes state. The state shown, 0xACE1 (hexadecimal) will be followed by 0x5670.

The bit positions that affect the next state are called the taps. In the diagram the taps are [16,14,13,11]. The rightmost bit of the LFSR is called the output bit. The taps are XOR'd sequentially with the output bit and then fed back into the leftmost bit. The sequence of bits in the rightmost position is called the output stream.

The sequence of numbers generated by an LFSR or its XNOR counterpart can be considered a binary numeral system just as valid as Gray code or the natural binary code.

The arrangement of taps for feedback in an LFSR can be expressed in finite field arithmetic as a polynomial mod 2. This means that the coefficients of the polynomial must be 1's or 0's. This is called the feedback polynomial or reciprocal characteristic polynomial. For example, if the taps are at the 16th, 14th, 13th and 11th bits (as shown), the feedback polynomial is

x^{16} + x^{14} + x^{13} + x^{11} + 1.\,

The 'one' in the polynomial does not correspond to a tap — it corresponds to the input to the first bit (i.e. x0, which is equivalent to 1). The powers of the terms represent the tapped bits, counting from the left. The first and last bits are always connected as an input and output tap respectively.

Tables of primitive polynomials from which maximum-length LFSRs can be constructed are given below and in the references.

Some example C code is below:

 # include <stdint.h> int main(void) {     uint16_t lfsr = 0xACE1u;     unsigned bit;     unsigned period = 0;       do     {         /* taps: 16 14 13 11; feedback polynomial: x^16 + x^14 + x^13 + x^11 + 1 */         bit  = ((lfsr >> 0) ^ (lfsr >> 2) ^ (lfsr >> 3) ^ (lfsr >> 5) ) & 1;         lfsr =  (lfsr >> 1) | (bit << 15);         ++period;     } while(lfsr != 0xACE1u);       return 0; } 

The above code assumes the most significant bit of lfsr is bit 1, and the least significant bit is bit 16.

As well as Fibonacci, this LFSR configuration is also known as standard, many-to-one or external XOR gates. LFSR has an alternative configuration.

Galois LFSRs[edit]

Named after the French mathematician Évariste Galois, an LFSR in Galois configuration, which is also known as modular, internal XORs as well as one-to-many LFSR, is an alternate structure that can generate the same output stream as a conventional LFSR (but offset in time).[2] In the Galois configuration, when the system is clocked, bits that are not taps are shifted one position to the right unchanged. The taps, on the other hand, are XOR'd with the output bit before they are stored in the next position. The new output bit is the next input bit. The effect of this is that when the output bit is zero all the bits in the register shift to the right unchanged, and the input bit becomes zero. When the output bit is one, the bits in the tap positions all flip (if they are 0, they become 1, and if they are 1, they become 0), and then the entire register is shifted to the right and the input bit becomes 1.

A 16-bit Galois LFSR. The register numbers in white correspond to the same primitive polynomial as the Fibonacci example but are counted in reverse to the shifting direction. This register also cycles through the maximal number of 65535 states excluding the all-zeroes state. The state ACE1 hex shown will be followed by E270 hex.

To generate the same output stream, the order of the taps is the counterpart (see above) of the order for the conventional LFSR, otherwise the stream will be in reverse. Note that the internal state of the LFSR is not necessarily the same. The Galois register shown has the same output stream as the Fibonacci register in the first section. A time offset exists between the streams, so a different startpoint will be needed to get the same output each cycle.

Below is a code example of a 32-bit maximal period Galois LFSR that is valid in C:

 # include <stdint.h> int main(void) {     uint32_t lfsr = 1;     unsigned period = 0;       do     {         /* taps: 32 31 29 1; feedback polynomial: x^32 + x^31 + x^29 + x + 1 */         lfsr = (lfsr >> 1) ^ (-(lfsr & 1u) & 0xD0000001u);         ++period;     } while(lfsr != 1u);       return 0; } 

And here is the code for the 16 bit example in the figure

 # include <stdint.h> int main(void) {     uint16_t lfsr = 0xACE1u;     unsigned period = 0;       do     {         /* taps: 16 14 13 11; feedback polynomial: x^16 + x^14 + x^13 + x^11 + 1 */         lfsr = (lfsr >> 1) ^ (-(lfsr & 1u) & 0xB400u);            ++period;     } while(lfsr != 0xACE1u);       return 0; } 

These code examples create a toggle mask to apply to the shifted value using the XOR operator. The mask is created by first removing all but the least significant bit (the output bit) of the current value. This value is then negated (two's complement negation), which creates a value of either all 0s or all 1s, if the output bit is 0 or 1, respectively. By ANDing the result with the tap-value (e.g., 0xB400 in the second example) before applying it as the toggle mask, it acts functionally as a conditional to either apply or not apply the toggle mask based on the output bit. A more explicit but significantly less efficient code example is shown below.

 # include <stdint.h> int main(void) {     uint16_t lfsr = 0xACE1u;     unsigned period = 0;       do     {         unsigned lsb = lfsr & 1;  /* Get lsb (i.e., the output bit). */         lfsr >>= 1;               /* Shift register */         if (lsb == 1)             /* Only apply toggle mask if output bit is 1. */         lfsr ^= 0xB400u;          /* Apply toggle mask, value has 1 at bits corresponding                                    * to taps, 0 elsewhere. */         ++period;     } while(lfsr != 0xACE1u);       return 0; } 

Non-binary Galois LFSR[edit]

Binary Galois LFSRs like the ones shown above can be generalized to any q-ary alphabet {0, 1, ..., q − 1} (e.g., for binary, q is equal to two, and the alphabet is simply {0, 1}). In this case, the exclusive-or component is generalized to addition modulo-q (note that XOR is addition modulo 2), and the feedback bit (output bit) is multiplied (modulo-q) by a q-ary value which is constant for each specific tap point. Note that this is also a generalization of the binary case, where the feedback is multiplied by either 0 (no feedback, i.e., no tap) or 1 (feedback is present). Given an appropriate tap configuration, such LFSRs can be used to generate Galois fields for arbitrary prime values of q.

Some polynomials for maximal LFSRs[edit]

The following table lists maximal-length polynomials for shift-register lengths up to 19. Note that more than one maximal-length polynomial may exist for any given shift-register length. A list of alternative maximal-length polynomials for shift-register lengths 4-32 (beyond which it becomes unfeasible to store or transfer them) can be found here: http://www.ece.cmu.edu/~koopman/lfsr/index.html

BitsFeedback polynomialPeriod
n2^n - 1
2x^2 + x + 13
3x^3 + x^2 + 17
4x^4 + x^3 + 115
5x^{ 5 }+x^{ 3 }+131
6x^{ 6 }+x^{ 5 }+163
7x^{ 7 }+x^{ 6 }+1127
8x^{ 8 }+x^{ 6 }+x^{ 5 }+x^{ 4 }+1255
9x^{ 9 }+x^{ 5 }+1511
10x^{ 10 }+x^{ 7 }+11023
11x^{ 11 }+x^{ 9 }+12047
12x^{ 12 }+x^{ 11 }+x^{ 10 }+x^{ 4 }+14095
13x^{ 13 }+x^{ 12 }+x^{ 11 }+x^{ 8 }+18191
14x^{ 14 }+x^{ 13 }+x^{ 12 }+x^{ 2 }+116383
15x^{ 15 }+x^{ 14 }+132767
16x^{ 16 }+x^{ 14 }+x^{ 13 }+x^{ 11 }+165535
17x^{ 17 }+x^{ 14 }+1131071
18x^{ 18 }+x^{ 11 }+1262143
19x^{ 19 }+x^{ 18 }+x^{ 17 }+x^{ 14 }+1524287
20-168[1]
2-786,1024,2048,4096[2]

Output-stream properties[edit]

Applications[edit]

LFSRs can be implemented in hardware, and this makes them useful in applications that require very fast generation of a pseudo-random sequence, such as direct-sequence spread spectrum radio. LFSRs have also been used for generating an approximation of white noise in various programmable sound generators.

Uses as counters[edit]

The repeating sequence of states of an LFSR allows it to be used as a clock divider, or as a counter when a non-binary sequence is acceptable as is often the case where computer index or framing locations need to be machine-readable.[4] LFSR counters have simpler feedback logic than natural binary counters or Gray code counters, and therefore can operate at higher clock rates. However it is necessary to ensure that the LFSR never enters an all-zeros state, for example by presetting it at start-up to any other state in the sequence. The table of primitive polynomials shows how LFSRs can be arranged in Fibonacci or Galois form to give maximal periods. One can obtain any other period by adding to an LFSR that has a longer period some logic that shortens the sequence by skipping some states.

Uses in cryptography[edit]

LFSRs have long been used as pseudo-random number generators for use in stream ciphers (especially in military cryptography), due to the ease of construction from simple electromechanical or electronic circuits, long periods, and very uniformly distributed output streams. However, an LFSR is a linear system, leading to fairly easy cryptanalysis. For example, given a stretch of known plaintext and corresponding ciphertext, an attacker can intercept and recover a stretch of LFSR output stream used in the system described, and from that stretch of the output stream can construct an LFSR of minimal size that simulates the intended receiver by using the Berlekamp-Massey algorithm. This LFSR can then be fed the intercepted stretch of output stream to recover the remaining plaintext.

Three general methods are employed to reduce this problem in LFSR-based stream ciphers:

Important LFSR-based stream ciphers include A5/1 and A5/2, used in GSM cell phones, E0, used in Bluetooth, and the shrinking generator. The A5/2 cipher has been broken and both A5/1 and E0 have serious weaknesses.[5][6]

The linear feedback shift register has a strong relationship to linear congruential generators.[7]

Uses in circuit testing[edit]

LFSRs are used in circuit testing, for test pattern generation(for exhaustive testing, pseudo random testing or pseudo exhaustive testing) and signature analysis.

Test Pattern Generation[edit]

Complete LFSRs are commonly used as a pattern generator for exhaustive testing, since they cover all possible inputs for an n input circuit. Maximum length LFSRs and weighted LFSRs are widely used as a pseudo-random test pattern generators for pseudo-random test applications.

Signature Analysis[edit]

In Built In Self Testing (BIST) techniques, storing all the circuit outputs on chip is not possible, but the circuit output can be compressed to form a signature which later will be compared to the golden signature (of the good circuit) to detect the faults. Since this compression is lossy, there is always a probability that a faulty output also generates the same signature as the golden signature and the faults can not be detected. This condition is called error masking or aliasing.

Uses in digital broadcasting and communications[edit]

Scrambling[edit]

To prevent short repeating sequences (e.g., runs of 0's or 1's) from forming spectral lines that may complicate symbol tracking at the receiver or interfere with other transmissions, linear feedback registers are often used to "randomize" the transmitted bitstream. This randomization is removed at the receiver after demodulation. When the LFSR runs at the same bit rate as the transmitted symbol stream, this technique is referred to as scrambling. When the LFSR runs considerably faster than the symbol stream, expanding the bandwidth of the transmitted signal, this is direct-sequence spread spectrum.

Neither scheme should be confused with encryption or encipherment; scrambling and spreading with LFSRs do not protect the information from eavesdropping. They are instead used to produce equivalent streams that possess convenient engineering properties to allow for robust and efficient modulation and demodulation.

Digital broadcasting systems that use linear feedback registers:

Other digital communications systems using LFSRs:

Other uses[edit]

The German time signal DCF77, in addition to amplitude keying, employs phase-shift keying driven by a 9-stage LFSR to increase the accuracy of received time and the robustness of the data stream in the presence of noise.[9]

The Global Positioning System uses an LFSR to rapidly transmit a sequence that indicates high-precision relative time offsets.

LFSRs are also used in Communications System Jamming systems in which they are used to generate pseudo random noise to raise the noise floor of a target communication system.

See also[edit]

References[edit]

  1. ^ Linear Feedback Shift Registers in Virtex Devices
  2. ^ Beker, Henry; Piper, Fred (1982). Cipher Systems: The Protection of Communications. Wiley-Interscience. p. 212. 
  3. ^ http://www.xilinx.com/support/documentation/application_notes/xapp052.pdf
  4. ^ http://www.xilinx.com/support/documentation/application_notes/xapp052.pdf
  5. ^ Barkam, Elad; Biham, Eli; Keller, Nathan (2008), "Instant Ciphertext-Only Cryptanalysis of GSM Encrypted Communication", Journal of Cryptology 21 (3): 392–429 
  6. ^ Lu, Yi; Willi Meier; Serge Vaudenay (2005). "The Conditional Correlation Attack: A Practical Attack on Bluetooth Encryption". Crypto 2005 (Santa Barbara, California, USA) 3621: 97–117. doi:10.1007/11535218_7. 
  7. ^ RFC 4086 section 6.1.3 "Traditional Pseudo-random Sequences"
  8. ^ Section 9.5 of the SATA Specification, revision 2.6
  9. ^ Hetzel, P. (16 March 1988). "Time dissemination via the LF transmitter DCF77 using a pseudo-random phase-shift keying of the carrier". 2nd European Frequency and Time Forum. Neuchâtel. pp. 351–364. Retrieved 11 October 2011. 

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