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The 555 timer IC is an integrated circuit (chip) used in a variety of timer, pulse generation, and oscillator applications. The 555 can be used to provide time delays, as an oscillator, and as a flip-flop element. Derivatives provide up to four timing circuits in one package.
Introduced in 1971 by Signetics, the 555 is still in widespread use due to its ease of use, low price, and stability. It is now made by many companies in the original bipolar and also in low-power CMOS types. As of 2003[update], it was estimated that 1 billion units are manufactured every year.
Depending on the manufacturer, the standard 555 package includes 25 transistors, 2 diodes and 15 resistors on a silicon chip installed in an 8-pin mini dual-in-line package (DIP-8). Variants available include the 556 (a 14-pin DIP combining two 555s on one chip), and the two 558 & 559s (both a 16-pin DIP combining four slightly modified 555s with DIS & THR connected internally, and TR is falling edge sensitive instead of level sensitive).
The NE555 parts were commercial temperature range, 0 °C to +70 °C, and the SE555 part number designated the military temperature range, −55 °C to +125 °C. These were available in both high-reliability metal can (T package) and inexpensive epoxy plastic (V package) packages. Thus the full part numbers were NE555V, NE555T, SE555V, and SE555T. It has been hypothesized that the 555 got its name from the three 5 kΩ resistors used within, but Hans Camenzind has stated that the number was arbitrary.
Low-power versions of the 555 are also available, such as the 7555 and CMOS TLC555. The 7555 is designed to cause less supply noise than the classic 555 and the manufacturer claims that it usually does not require a "control" capacitor and in many cases does not require a decoupling capacitor on the power supply. Those parts should generally be included, however, because noise produced by the timer or variation in power supply voltage might interfere with other parts of a circuit or influence its threshold voltages.
The connection of the pins for a DIP package is as follows:
|1||GND||Ground reference voltage, low level (0 V)|
|2||TRIG||The OUT pin goes high and a timing interval starts when this input falls below 1/2 of CTRL voltage (which is typically 1/3 of VCC, when CTRL is open).|
|3||OUT||This output is driven to approximately 1.7 V below +VCC or GND.|
|4||RESET||A timing interval may be reset by driving this input to GND, but the timing does not begin again until RESET rises above approximately 0.7 volts. Overrides TRIG which overrides THR.|
|5||CTRL||Provides "control" access to the internal voltage divider (by default, 2/3 VCC).|
|6||THR||The timing (OUT high) interval ends when the voltage at THR is greater than that at CTRL (2/3 VCC if CTRL is open).|
|7||DIS||Open collector output which may discharge a capacitor between intervals. In phase with output.|
|8||VCC||Positive supply voltage, which is usually between 3 and 15 V depending on the variation.|
Pin 5 is also sometimes called the CONTROL VOLTAGE pin. By applying a voltage to the CONTROL VOLTAGE input one can alter the timing characteristics of the device. In most applications, the CONTROL VOLTAGE input is not used. It is usual to connect a 10 nF capacitor between pin 5 and 0 V to prevent interference. The CONTROL VOLTAGE input can be used to build an astable with a frequency modulated output.
The 555 has three operating modes:
In the monostable mode, the 555 timer acts as a "one-shot" pulse generator. The pulse begins when the 555 timer receives a signal at the trigger input that falls below a third of the voltage supply. The width of the output pulse is determined by the time constant of an RC network, which consists of a capacitor (C) and a resistor (R). The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be lengthened or shortened to the need of the specific application by adjusting the values of R and C.
The output pulse width of time t, which is the time it takes to charge C to 2/3 of the supply voltage, is given by
While using the timer IC in monostable mode, the main disadvantage is that the time span between any two triggering pulses must be greater than the RC time constant.
In bistable mode, the 555 timer acts as a basic flip-flop. The trigger and reset inputs (pins 2 and 4 respectively on a 555) are held high via Pull-up resistors while the threshold input (pin 6) is simply floating. Thus configured, pulling the trigger momentarily to ground acts as a 'set' and transitions the output pin (pin 3) to Vcc (high state). Pulling the reset input to ground acts as a 'reset' and transitions the output pin to ground (low state). No capacitors are required in a bistable configuration. Pin 5 (control) is connected to ground via a small-value capacitor (usually 0.01 to 0.1 uF); pin 7 (discharge) is left floating.
In astable mode, the 555 timer puts out a continuous stream of rectangular pulses having a specified frequency. Resistor R1 is connected between VCC and the discharge pin (pin 7) and another resistor (R2) is connected between the discharge pin (pin 7), and the trigger (pin 2) and threshold (pin 6) pins that share a common node. Hence the capacitor is charged through R1 and R2, and discharged only through R2, since pin 7 has low impedance to ground during output low intervals of the cycle, therefore discharging the capacitor.
In the astable mode, the frequency of the pulse stream depends on the values of R1, R2 and C:
The high time from each pulse is given by:
and the low time from each pulse is given by:
The power capability of R1 must be greater than .
Particularly with bipolar 555s, low values of must be avoided so that the output stays saturated near zero volts during discharge, as assumed by the above equation. Otherwise the output low time will be greater than calculated above. It should be noted that the first cycle will take appreciably longer than the calculated time, as the capacitor must charge from 0V to 2/3 of VCC from power-up, but only from 1/3 of VCC to 2/3 of VCC on subsequent cycles.
To achieve a duty cycle of less than 50% is to use a small diode (that is fast enough for the application) in parallel with R2 (instead of placing it on pin 7), with the cathode on the capacitor side. This bypasses R2 during the high part of the cycle so that the high interval depends approximately only on R1 and C. The presence of the diode is a voltage drop that slows charging on the capacitor so that the high time is longer than the expected and often-cited ln(2)*R1C = 0.693 R1C. The low time will be the same as without the diode as shown above. With a diode, the high time is
where Vdiode is when the diode has a current of 1/2 of Vcc/R1 which can be determined from its datasheet or by testing. As an extreme example, when Vcc= 5 and Vdiode= 0.7, high time = 1.00 R1C which is 45% longer than the "expected" 0.693 R1C. At the other extreme, when Vcc= 15 and Vdiode= 0.3, the high time = 0.725 R1C which is closer to the expected 0.693 R1C. The equation reduces to the expected 0.693 R1C if Vdiode= 0.
The operation of RESET in this mode is not well defined, some manufacturers' parts will hold the output state to what it was when RESET is taken low, others will send the output either high or low.
These specifications apply to the NE555. Other 555 timers can have different specifications depending on the grade (military, medical, etc.).
|Supply voltage (VCC)||4.5 to 15 V|
|Supply current (VCC = +5 V)||3 to 6 mA|
|Supply current (VCC = +15 V)||10 to 15 mA|
|Output current (maximum)||200 mA|
|Maximum Power dissipation||600 mW|
|Power consumption (minimum operating)||30 mW@5V, 225 mW@15V|
|Operating temperature||0 to 70 °C|
Many pin-compatible variants, including CMOS versions, have been built by various companies. Bigger packages also exist with two or four timers on the same chip. The 555 is also known under the following type numbers:
|Custom Silicon Solutions||CSS555/CSS555C||CMOS from 1.2 V, IDD < 5 µA|
|IK Semicon||ILC555||CMOS from 2 V|
|Maxim||ICM7555||CMOS from 2 V|
|National Semiconductor||LMC555||CMOS from 1.5 V|
|Texas Instruments||TLC555||CMOS from 2 V|
|X-REL Semiconductor||XTR655||Operation from -60°C to 250+°C|
|Zetex||ZSCT1555||down to 0.9 V|
|HFO / East Germany||B555|
The dual version is called 556. It features two complete 555s in a 14 pin DIL package.
The quad version is called 558 and has 16 pins. To fit four 555s into a 16 pin package the control, voltage, and reset lines are shared by all four modules. Each module's discharge and threshold circuits are wired together internally.
This version includes non-overlapped complementary outputs, coarse temperature sensor and on-chip 200pF timing capacitance.
The Apple II microcomputer used a quad timer 558 in monostable (or "one-shot") mode to interface up to four "game paddles" or two joysticks to the host computer. It also used a single 555 for flashing the display cursor.
A similar circuit was used in the IBM PC. In the joystick interface circuit of the IBM PC, the capacitor (C) of the RC network (see Monostable Mode above) was generally a 10 nF capacitor. The resistor (R) of the RC network consisted of the potentiometer inside the joystick along with an external resistor of 2.2 kilohms. The joystick potentiometer acted as a variable resistor. By moving the joystick, the resistance of the joystick increased from a small value up to about 100 kilohms. The joystick operated at 5 V.
Software running in the host computer started the process of determining the joystick position by writing to a special address (ISA bus I/O address 201h). This would result in a trigger signal to the quad timer, which would cause the capacitor (C) of the RC network to begin charging and cause the quad timer to output a pulse. The width of the pulse was determined by how long it took the C to charge up to 2/3 of 5 V (or about 3.33 V), which was in turn determined by the joystick position. The software then measured the pulse width to determine the joystick position. A wide pulse represented the full-right joystick position, for example, while a narrow pulse represented the full-left joystick position.
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